Vladimir Serbinenko bd82d18ee5 sandybridge: Always include MRC if not using native RAM init. ... Otherwise the image is simply unusable. Change-Id: I1e2562ba17279d14dc73b05e4f8fa493e06fbcd2 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: https://review.coreboot.org/13699 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>		2016-02-13 08:25:25 +01:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	x86: make bootblock size for C_ENVIRONMENT_BOOTBLOCK configurable	2016-02-13 01:15:36 +01:00
commonlib	commonlib: move uefi includes out of commonlib includes	2016-02-02 14:27:03 +01:00
console	console: Disable SQUELCH_EARLY_SMP if SMP is not selected	2016-02-09 17:14:50 +01:00
cpu	Make MRC vs native a config rather than making a separate chipset for it.	2016-02-12 17:09:05 +01:00
device	arch/x86: Drop arch/pciconf.h	2016-01-26 20:22:44 +01:00
drivers	intel/fsp1_0: Allow the MRC cache to live in a FMAP region	2016-02-10 16:27:12 +01:00
ec	ASL: Remove unused modulo recipient.	2016-02-09 22:56:00 +01:00
include	lzma: Port size-checking ulzman() version to coreboot	2016-02-12 22:00:55 +01:00
lib	lzma: Port size-checking ulzman() version to coreboot	2016-02-12 22:00:55 +01:00
mainboard	sandybridge: Always include MRC if not using native RAM init.	2016-02-13 08:25:25 +01:00
northbridge	sandybridge: Always include MRC if not using native RAM init.	2016-02-13 08:25:25 +01:00
soc	soc/intel/apollolake: add assert for pad constraints	2016-02-13 01:16:27 +01:00
southbridge	Make MRC vs native a config rather than making a separate chipset for it.	2016-02-12 17:09:05 +01:00
superio	superio/nuvoton/nct5572d: Add PS/2 presence detect	2016-02-09 20:34:15 +01:00
vendorcode	chromeos/Kconfig: Remove dependency on GBB_HAVE_BMPFV	2016-02-10 16:53:55 +01:00
Kconfig	timestamp: Remove HAS_PRECBMEM_TIMESTAMP_REGION Kconfig	2016-02-12 21:54:52 +01:00