4d244214ce
This moves PMIC_BUS from each mainboard's board.h file to a per- mainboard Kconfig variable. To prevent humans from forgetting to set a valid value, an invalid default is set in the rk3288 Kconfig and checked in rk808.c so that compilation will fail if the mainboard Kconfig does not override it. Originally, PMIC_BUS was only used by mainboard code as an argument to RK808 PMIC functions. To conform to the generic RTC API, however, the RK808 code needs to have the bus number globally defined somewhere since the rtc_get() and rtc_set() functions don't take any args. Since CONFIG_PMIC_BUS is globally visible, we no longer need to pass bus number to the PMIC functions. BUG=chrome-os-partner:34436 BRANCH=none TEST=built and booted on Pinky Signed-off-by: David Hendricks <dhendrix@chromium.org> Change-Id: I73783878e507b2e7b1526dd2f81cfbdf8f1e2a55 Reviewed-on: https://chromium-review.googlesource.com/240203 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-on: http://review.coreboot.org/9642 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
91 lines
2 KiB
Text
91 lines
2 KiB
Text
##
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## This file is part of the coreboot project.
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##
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## Copyright 2014 Rockchip Inc.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; version 2 of the License.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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if BOARD_GOOGLE_VEYRON_JERRY
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config BOARD_SPECIFIC_OPTIONS # dummy
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def_bool y
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select BOARD_ID_SUPPORT
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select CHROMEOS_VBNV_EC
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select COMMON_CBFS_SPI_WRAPPER
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select EC_GOOGLE_CHROMEEC
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select EC_GOOGLE_CHROMEEC_SPI
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select EC_SOFTWARE_SYNC
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select RAM_CODE_SUPPORT
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select SOC_ROCKCHIP_RK3288
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select MAINBOARD_DO_NATIVE_VGA_INIT
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select MAINBOARD_HAS_CHROMEOS
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select BOARD_ROMSIZE_KB_4096
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select MAINBOARD_HAS_BOOTBLOCK_INIT
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select HAVE_HARD_RESET
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select RETURN_FROM_VERSTAGE
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select SPI_FLASH
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select SPI_FLASH_GIGADEVICE
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select VIRTUAL_DEV_SWITCH
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config MAINBOARD_DIR
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string
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default google/veyron_jerry
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config MAINBOARD_PART_NUMBER
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string
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default "Veyron_Jerry"
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config MAINBOARD_VENDOR
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string
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default "Google"
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config EC_GOOGLE_CHROMEEC_SPI_BUS
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hex
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default 0
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config EC_GOOGLE_CHROMEEC_SPI_WAKEUP_DELAY_US
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int
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default 100
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config VBOOT_RAMSTAGE_INDEX
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hex
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default 0x3
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config BOOT_MEDIA_SPI_BUS
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int
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default 2
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config DRAM_SIZE_MB
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int
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default 2048
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config DRIVER_TPM_I2C_BUS
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hex
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default 0x1
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config DRIVER_TPM_I2C_ADDR
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hex
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default 0x20
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config CONSOLE_SERIAL_UART_ADDRESS
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hex
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depends on CONSOLE_SERIAL_UART
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default 0xFF690000
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config PMIC_BUS
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int
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default 0
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endif # BOARD_GOOGLE_VEYRON_JERRY
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