Arthur Heymans c141323c62 mb/*/*/cmos.layout: Fix the values for the console level ... Fix the values that were off by one. This was discovered when using postcar stage that prints with debuglevel BIOS_NEVER. Change-Id: I73a077950ed0dc735d89c9747a8da0a25f30822d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/23186 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>		2018-01-26 17:28:56 +00:00
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acpi	*.asl: Remove obsolete reference to TPM ASL file	2017-04-24 19:14:11 +02:00
spd	kunimitsu: Remove incorrect dereferencing of pointer	2016-09-19 19:31:32 +02:00
acpi_tables.c	mainboard & southbridge: Clear files that are just headers	2016-12-05 19:20:49 +01:00
board_info.txt
bootblock_mainboard.c
chromeos.c	vboot: Assume EC_SOFTWARE_SYNC and VIRTUAL_DEV_SWITCH by default	2017-03-28 22:15:46 +02:00
chromeos.fmd
cmos.layout	mb/*/*/cmos.layout: Fix the values for the console level	2018-01-26 17:28:56 +00:00
devicetree.cb	soc/intel/skylake: Add LPC and SPI lock down config option	2017-08-25 17:58:08 +00:00
dsdt.asl
ec.c	ec/google/chromeec: Add library function google_chromeec_events_init	2017-10-08 19:38:28 +00:00
ec.h	mainboards: Remove unused EC event for thermal overload	2017-07-01 02:47:30 +00:00
gpio.h	skylake mainboards: Use PAD_CFG_GPI_GPIO_DRIVER instead of PAD_CFG_GPI	2017-10-09 20:20:40 +00:00
Kconfig	boardid: Switch from Kconfig to weak functions	2017-12-07 01:19:27 +00:00
Kconfig.name
mainboard.c	lib/nhlt: add support for setting the oem_revision	2016-12-01 08:17:42 +01:00
Makefile.inc	mb/google/*: Use newly added Chrome EC boardid function	2017-09-26 15:20:39 +00:00
pei_data.c
ramstage.c
romstage.c	src/mainboard: Fix various typos	2017-11-23 05:01:47 +00:00
romstage_fsp20.c
smihandler.c