coreboot-kgpe-d16/src
Edward O'Callaghan ed2bcaa731 mainboard/jetway/nf81-t56n-lf: Fix HWM base addr.
The target board has a different base addr. for its hardware
monitor (fans, temp, etc) from the Fintek Super I/O datasheet.

Change-Id: Ifc025cb92d0fc4e8f813091d00a6c87deae05863
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/5383
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2014-03-13 20:25:44 +01:00
..
arch smbios: Supply tag type 2 (base board information) 2014-03-09 21:21:46 +01:00
console console: Use single driver entry for UARTs 2014-03-04 15:40:34 +01:00
cpu x86: add MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING option 2014-03-07 15:30:27 +01:00
device devices: Allow to configure textmode in native gfx init. 2014-03-03 23:13:17 +01:00
drivers drivers/spi: Add support for adesto SPI flash parts 2014-03-12 01:03:31 +01:00
ec lenovo/x60: Unify volume button handling with common code. 2014-03-01 21:59:15 +01:00
include chromeos: provide option to dynamically allocate ram oops buffer 2014-03-11 21:37:36 +01:00
lib chromeos: provide option to dynamically allocate ram oops buffer 2014-03-11 21:37:36 +01:00
mainboard mainboard/jetway/nf81-t56n-lf: Fix HWM base addr. 2014-03-13 20:25:44 +01:00
northbridge console: Fix includes 2014-03-04 15:26:08 +01:00
soc baytrail: Reserve memory between ASEG and 1MB and for ramoops 2014-03-11 19:56:17 +01:00
southbridge bd82x6x, ibexpeak, lynxpoint: Unify SPI. 2014-03-04 00:00:57 +01:00
superio superio/fintek: Document Fintek F71869AD code. 2014-02-13 17:14:20 +01:00
vendorcode chromeos: provide option to dynamically allocate ram oops buffer 2014-03-11 21:37:36 +01:00
Kconfig Add a generic register script handler 2014-03-04 16:31:14 +01:00