coreboot-kgpe-d16/src/soc/intel/alderlake/spi.c
Subrata Banik 65f5932e0c soc/intel/alderlake: Add SPI DMI Destination ID
Port commit 237afda (src/soc/intel/tigerlake: Add SPI DMI Destination ID)
into Alderlake.

Change-Id: Ia0b465d405ab3c70b7d4094d32c182cab30fe531
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48754
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
2020-12-23 03:28:47 +00:00

34 lines
632 B
C

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
* This file is created based on Intel Alder Lake Processor PCH Datasheet
* Document number: 621483
* Chapter number: 7
*/
#include <intelblocks/fast_spi.h>
#include <intelblocks/spi.h>
#include <soc/pci_devs.h>
#include <soc/pcr_ids.h>
int spi_soc_devfn_to_bus(unsigned int devfn)
{
switch (devfn) {
case PCH_DEVFN_SPI:
return 0;
case PCH_DEVFN_GSPI0:
return 1;
case PCH_DEVFN_GSPI1:
return 2;
case PCH_DEVFN_GSPI2:
return 3;
case PCH_DEVFN_GSPI3:
return 4;
}
return -1;
}
uint32_t soc_get_spi_dmi_destination_id(void)
{
return SPI_DMI_DESTINATION_ID;
}