c4986eb7f4
Adding common chip config structure which will be used to return data to common code. When common code requires soc data, code used to fetch entire soc config structure. With this change, common code will only get the data/structure which is required by common code and not entire config. For now, adding i2c, gspi and lockdown configuration which will be used by common code. BUG=none BRANCH=b:78109109 TEST=compile code for APL/SKL/CNL. Boot using SKL/APL/CNL and check values are returned properly using common structure. Change-Id: I7f1671e064782397d3ace066a08bf1333192b21a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/26189 Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Hannah Williams <hannah.williams@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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| .. | ||
| spd | ||
| variants | ||
| acpi_tables.c | ||
| board_info.txt | ||
| boardid.c | ||
| bootblock.c | ||
| chromeos.c | ||
| chromeos.fmd | ||
| dsdt.asl | ||
| ec.c | ||
| Kconfig | ||
| Kconfig.name | ||
| mainboard.c | ||
| Makefile.inc | ||
| memory.c | ||
| ramstage.c | ||
| romstage.c | ||
| smihandler.c | ||