coreboot-kgpe-d16/src/northbridge/intel/x4x
Elyes HAOUAS c53665ce55 nb/intel/x4x: Remove variable set but not used
Change-Id: I142ae6f7806b3f57b98a158e8f26592aed8fa452
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32939
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-06-05 11:44:13 +00:00
..
acpi Remove DEFAULT_PCIEXBAR alias 2019-03-06 11:54:17 +00:00
acpi.c nb/northbridge/intel/x4x/acpi.c: Remove variable set but not used 2019-05-24 09:35:46 +00:00
bootblock.c arch/io.h: Drop unnecessary include 2019-03-04 15:08:03 +00:00
chip.h
dq_dqs.c src/northbridge/intel: Remove unused variables 2019-04-25 15:54:07 +00:00
early_init.c nb/intel/x4x/early_init.c: Remove variable set but not used 2019-05-23 08:56:30 +00:00
gma.c src/northbridge: Add missing 'include <types.h>' 2019-05-29 20:28:27 +00:00
iomap.h Remove DEFAULT_PCIEXBAR alias 2019-03-06 11:54:17 +00:00
Kconfig nb/intel/x4x: Put stage cache in TSEG 2019-01-24 13:44:14 +00:00
Makefile.inc nb/intel/x4x: Put stage cache in TSEG 2019-01-24 13:44:14 +00:00
northbridge.c src: Use 'include <string.h>' when appropriate 2019-03-20 20:27:51 +00:00
ram_calc.c nb/intel/{gm45,i945,x4x}: Correct array bounds checks 2019-04-11 11:27:41 +00:00
raminit.c src/northbridge: Add missing 'include <types.h>' 2019-05-29 20:28:27 +00:00
raminit_ddr23.c nb/intel/x4x: Remove variable set but not used 2019-06-05 11:44:13 +00:00
raminit_tables.c arch/io.h: Drop unnecessary include 2019-03-04 15:08:03 +00:00
rcven.c nb/intel/x4x/rcven.c: Remove variable set but not used 2019-06-04 13:18:14 +00:00
stage_cache.c nb/intel/stage_cache.c: Drop unnecessary includes 2019-03-13 04:23:23 +00:00
x4x.h nb/intel/x4x: Use common code for SMM in TSEG 2018-12-03 10:18:56 +00:00