Arthur Heymans 4d56a06255 nb/intel/broadwell: Add an option for where verstage starts ... Previously broadwell used a romcc bootblock and starting verstage in romstage was madatory but with C_ENVIRONMENT_BOOTBLOCK it is also possible to have a separate verstage. This selects using a separate verstage by default but still keeps the option around to use verstage in romstage. With a separate verstage the romstage becomes an RW stage. The mrc.bin however is only added to the RO COREBOOT fmap region as it requires to be run at a specific offset. This means that coreboot will have to jump from a RW region to the RO region for that binary and back to that RW region after that binary is done initializing the memory. Change-Id: I900233cadb3c76da329fb98f93917570e633365f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/30384 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-05-15 17:57:18 +00:00
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acpi
acpi_tables.c	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
board_info.txt
chromeos.c	mainboard: remove "recovery" gpio, selectively add "presence" gpio.	2019-05-13 09:21:51 +00:00
chromeos.fmd	mainboard: Enable PRESERVE flag in all vboot/chromeos FMD files	2019-03-05 20:52:06 +00:00
cmos.layout
devicetree.cb
dsdt.asl
fadt.c
gpio.c	soc/intel/broadwell: Move GPIO init to a common place	2019-05-14 23:22:02 +00:00
hda_verb.c
Kconfig
Kconfig.name
mainboard.c	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
Makefile.inc	nb/intel/broadwell: Add an option for where verstage starts	2019-05-15 17:57:18 +00:00
pei_data.c	src: Use 'include <string.h>' when appropriate	2019-03-20 20:27:51 +00:00
romstage.c	soc/intel/broadwell: Clean up the bootflow	2019-05-14 23:22:51 +00:00
thermal.h