coreboot-kgpe-d16/src/arch
Kyösti Mälkki 6739a6a89f vboot: Fix S3 resume with stage_cache
In VBOOT_STARTS_IN_ROMSTAGE=y case, vboot_run_logic() did not
get called when postcar was loaded from TSEG stage cache on
ACPI S3 resume path. Resume failed as MP init attempts to
access microcode update from unverified FW_MAIN_A/B section.

In a similar fashion, for POSTCAR=n, loading ramstage from
TSEG stage cache would bypass the call to vboot_run_logic().

TEST=samsung/lumpy with VBOOT_STARTS_IN_ROMSTAGE=y is able
to complete S3 resume.

Change-Id: I77fe86d5fd89d22b5ef6f43e65a85a4ccd3259d9
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76209
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Julius Werner <jwerner@chromium.org>
2023-07-10 04:43:05 +00:00
..
arm tree: Drop repeated words 2023-02-07 04:37:31 +00:00
arm64 arch/arm64/Makefile.inc: Fix Kconfig name in comment 2023-07-04 02:41:25 +00:00
ppc64 arch/ppc64/rom_media.c: move to mainboard/emulation/qemu-power* 2023-04-03 13:22:53 +00:00
riscv arch/riscv: Add clang as supported architecture 2023-06-11 19:25:34 +00:00
x86 vboot: Fix S3 resume with stage_cache 2023-07-10 04:43:05 +00:00