coreboot-kgpe-d16/src
Jacob Laska f3f654ddb9 src/arch/x86/acpi.c: Use correct host address width in DMAR ACPI table
The previous implementation assumed the CPU physical address size to
be 40 which is not true of all platforms. Use an existing function to
obtain the correct CPU physical address to report in the DMAR ACPI
table.

Change-Id: Ia79e9dadecc3f5f6a86ce3789b213222bef482b3
Signed-off-by: Jacob Laska <jlaska91@gmail.com>
Reviewed-on: https://review.coreboot.org/14102
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-03-18 19:15:25 +01:00
..
acpi acpi/: add missing license header 2016-01-14 22:52:11 +01:00
arch src/arch/x86/acpi.c: Use correct host address width in DMAR ACPI table 2016-03-18 19:15:25 +01:00
commonlib lz4_wrapper: Use __asm__ rather than asm. 2016-03-05 00:56:53 +01:00
console Kconfig: hide useless options on ARM. 2016-03-05 00:56:36 +01:00
cpu mtrr: Define a function for obtaining free var mtrr 2016-03-18 19:14:52 +01:00
device Kconfig: hide useless options on ARM. 2016-03-05 00:56:36 +01:00
drivers parade/ps8640: Clean up 2016-03-16 15:02:46 +01:00
ec Hide EC_GOOGLE_CHROMEEC_SPI_BUS. 2016-03-05 00:57:22 +01:00
include mtrr: Define a function for obtaining free var mtrr 2016-03-18 19:14:52 +01:00
lib cbmem: Fix cbmem_add_bootmem() 2016-03-11 09:52:46 +01:00
mainboard google/oak: Enable RAM_CODE_SUPPORT 2016-03-18 18:57:17 +01:00
northbridge cpu/x86/mtrr: move cache_ramstage() to its only user 2016-03-16 18:55:51 +01:00
soc mediatek/mt8173: mt6391: set VSRMCA7 to HW control by SRCVOLTEN 2016-03-18 18:56:23 +01:00
southbridge southbridge/intel/ibexpeak: Use common gpio.c 2016-02-23 00:28:26 +01:00
superio roda/rk9: Remove #include early_serial.c from romstage 2016-03-08 13:41:03 +01:00
vendorcode vendorcode/intel/Kconfig: Add broadwell_de symbol to fix lint 2016-03-15 15:23:40 +01:00
Kconfig Kconfig: remove COMPRESS_PRERAM_STAGES option from x86 2016-03-11 16:52:38 +01:00