coreboot-kgpe-d16/src/soc/cavium
Arthur Heymans bba14fe497 soc/cavium/cn81xx: Use correct size for MPIDR_EL1 register
Clang complains about this.

Change-Id: I2d761d2fa946f171033220ab7b2e399cf359782a
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74538
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2023-05-13 17:22:16 +00:00
..
cn81xx soc/cavium/cn81xx: Use correct size for MPIDR_EL1 register 2023-05-13 17:22:16 +00:00
common soc/cavium: Guard gcc specific compiler flag 2023-05-13 09:31:39 +00:00