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Paul Menzel 5554226426 Spell Intel Cooper Lake-SP with a space 
Use the official spelling. [1]

[1]: https://ark.intel.com/content/www/us/en/ark/products/codename/189143/products-formerly-cooper-lake.html

Change-Id: I7dbd332600caa7c04fc4f6bac53880e832e97bda
Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59036
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by:  Felix Singer <felixsinger@posteo.net>
 		2021-11-11 14:28:13 +00:00
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RFC Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
_static
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acpi Documentation/acpi/gpio.md: Update implementation details 2021-11-05 12:40:47 +00:00
arch Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
cbfstool Docs/cbfstool: Add details about memory mapped window handling 2020-12-11 01:11:16 +00:00
community Documentation: Explain how to join Slack 2021-10-08 15:42:25 +00:00
contributing Documentation: Improve preamble of coding style 2021-10-17 11:47:01 +00:00
doxygen
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drivers Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
flash_tutorial Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
getting_started Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
gfx
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ifdtool Documentation: Use correct KiB/MiB units instead of KB/MB 2021-02-09 07:47:41 +00:00
infrastructure Documentation: Fix up toctree 2021-05-28 17:58:06 +00:00
lib Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
mainboard mb/system76/oryp8: Add System76 Oryx Pro 8 2021-11-02 20:48:37 +00:00
northbridge Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
releases Spell Intel Cooper Lake-SP with a space 2021-11-11 14:28:13 +00:00
security Documentation/security/vboot: Update 4.15 vboot supported boards 2021-11-09 15:49:46 +00:00
soc Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
superio Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
technotes Documenation: call out `lcov` as required 2021-10-29 05:09:57 +00:00
tutorial Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
vendorcode
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.gitignore
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AMD-S3.txt
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COPYING
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Doxyfile.coreboot
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Doxyfile.coreboot_simple
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Makefile
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Makefile.sphinx
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POSTCODES
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beginverbatim.tex
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cbfs.txt
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codeflow.svg
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conf.py Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
corebootBuildingGuide.tex
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coreboot_logo.png
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distributions.md Documentation: Remove libretrend from coreboot distributors 2021-10-27 14:51:41 +00:00
endverbatim.tex
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gcov.txt Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00
hypertransport.svg
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index.md Documentation: Open up avenue for codifying our best practices 2021-10-29 06:31:29 +00:00
payloads.md payloads/Tianocore: Update default build target, simplify build options 2021-05-13 08:30:57 +00:00
util.md Documentation: Fix spelling errors 2021-10-05 18:06:24 +00:00