Arthur Heymans eb2fc04c97 mb/foxconn/d41s: Add mainboard

This supports the Foxconn d41s, d42s, d51s, d52s.

The following is tested (SeaBIOS 1.12 + Linux 4.9) and works:
- COM1
- S3 resume (with SeaBIOS needs sercon disabled)
- Native graphic init on VGA output
- SATA
- USB
- Ethernet
- PS2 keyboard

The base for this mainboard port was the Intel D510MO port.

Change-Id: Ie4ec9cbf70adcdddbc2e5d805e4806825c320072
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/28227
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

2018-08-23 15:51:47 +00:00

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Foxconn D41S

This page describes how to run coreboot on the FOXCONN D41S desktop from FOXCONN. The D42S, D51S, D52S are compatible boards with the difference being the CPU.

Building coreboot

The default options for this board should result in a fully working image:

# echo "CONFIG_VENDOR_FOXCONN=y" > .config
# echo "CONFIG_BOARD_FOXCONN_D41S=y" >> .config
# make olddefconfig && make

Flashing coreboot

+---------------------+--------+
| Type                | Value  |
+=====================+========+
| Socketed flash      | yes    |
+---------------------+--------+
| Model               | W25X80 |
+---------------------+--------+
| Size                | 1 MiB  |
+---------------------+--------+
| In circuit flashing | yes    |
+---------------------+--------+
| Package             | DIP-8  |
+---------------------+--------+
| Write protection    | No     |
+---------------------+--------+
| Dual BIOS feature   | No     |
+---------------------+--------+
| Internal flashing   | yes    |
+---------------------+--------+

Internal programming

The SPI flash can be accessed using flashrom.

External programming

The easiest to flash externally is to simply extract the SPI flash from its socket. To do this gently take the SPI flash out of its socket and flash with your programmer.

NOTE: Don't forget to set the WP# AND HOLD# to 3V.

NOTE2: Make sure to reinsert it in the right direction afterward

Location and orientation of the SPI flash socket

Technology

+------------------+------------------+
| Northbridge      | Intel Pinevew    |
+------------------+------------------+
| Southbridge      | Intel NM10       |
+------------------+------------------+
| CPU              | model_106cx      |
+------------------+------------------+
| SuperIO          | ITE IT8721F      |
+------------------+------------------+
| clockgen (CK505) | ICS 9LPRS525AGLF |
+------------------+------------------+

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