coreboot-kgpe-d16/src
Lucas Chen cc11c97b70 eve: Add PL1 override to 7W
Change PL1 from 4.5W to 7W, based on thermal test results.

BRANCH=eve
BUG=b:73133864
TEST=Verify the MSR PL1 limitation is set to 7W.

Change-Id: Ic3629f9c3b7eb6eef1a1b5a3051c9a11448bc9ad
Signed-off-by: Lucas Chen <lucas.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/28078
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-08-20 15:59:15 +00:00
..
acpi
arch arm64: Factor out common parts of romstage execution flow 2018-08-17 21:29:46 +00:00
commonlib src/{commonlib,lib}: Fix typo 2018-08-16 18:55:08 +00:00
console arch/x86: Drop leftover ROMCC console support 2018-06-08 03:31:12 +00:00
cpu cpu/intel/common: add function to init cppc_config 2018-08-20 15:53:28 +00:00
device nb/intel/sandybridge: Fill in DIMM serial number 2018-08-20 09:51:22 +00:00
drivers drivers/pc80/rtc: do not warn if CMOS options are unavailable 2018-08-20 10:57:41 +00:00
ec ec/lenovo/pmh7: use read/write function in clear_bit/set_bit 2018-08-20 06:57:18 +00:00
include soc/intel/common/block: Add WHL 2-core SKU 2018-08-20 15:50:57 +00:00
lib src/{commonlib,lib}: Fix typo 2018-08-16 18:55:08 +00:00
mainboard eve: Add PL1 override to 7W 2018-08-20 15:59:15 +00:00
northbridge nb/intel/raminit: Remove unused headers 2018-08-20 09:52:08 +00:00
security cr50: Allow boards to disable powering off EC on cr50 update 2018-08-17 12:27:23 +00:00
soc soc/intel/skylake: Support PL1 override option 2018-08-20 15:58:52 +00:00
southbridge Fix PCI ACPI _OSC methods 2018-08-17 21:09:17 +00:00
superio superio/ite/it8720f: fix power control init 2018-08-17 18:27:00 +00:00
vendorcode cr50: Allow boards to disable powering off EC on cr50 update 2018-08-17 12:27:23 +00:00
Kconfig Kconfig: Make the EM100 config option common 2018-07-16 07:41:14 +00:00