coreboot-kgpe-d16/src
Youness Alaoui cc558e6223 purism/librem13: Enable support for M.2 NVMe
Enable/Disable the PCIe ports to match factory BIOS. The port #6
is used for PCIe on the M.2 connector which allows for NVMe SSDs
to function.

Change-Id: I8058cbad3da651144545d588c0ae78c5f5e598ac
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
Reviewed-on: https://review.coreboot.org/19446
Tested-by: build bot (Jenkins)
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
2017-05-01 00:44:15 +02:00
..
acpi
arch arch/x86: Add read64 and write64 functions 2017-04-25 06:14:39 +02:00
commonlib commonlib: Add ID for STORAGE_DATA 2017-04-28 19:56:11 +02:00
console console: rework log level to not be reliant on ROMSTAGE_CONST 2017-04-25 18:13:56 +02:00
cpu nb/amd/amdk8: Link reset_test.c 2017-04-28 17:17:40 +02:00
device x86/acpi: Use initialized VBIOS in VFCT table 2017-04-27 18:17:57 +02:00
drivers drivers/intel/fsp2_0: add option to incorporate platform memory version 2017-04-28 15:56:49 +02:00
ec ec/roda/it8518: Do EC write manually with long timeout 2017-04-08 13:17:56 +02:00
include nb/amdk8: Link coherent_ht.c 2017-04-28 17:20:51 +02:00
lib cbmem_console: Document known reimpementations of console structure/API 2017-04-26 01:31:51 +02:00
mainboard purism/librem13: Enable support for M.2 NVMe 2017-05-01 00:44:15 +02:00
northbridge nb/amdk8: Link coherent_ht.c 2017-04-28 17:20:51 +02:00
soc soc/intel/skylake: Use ITSS common code 2017-04-28 16:32:20 +02:00
southbridge sb/nvidia/mcp55: Link early_ctrl.c 2017-04-28 17:19:37 +02:00
superio superio/fintek: Add support for Fintek F71808A 2017-03-27 19:19:56 +02:00
vboot vboot: Separate board name and version number in FWID with a dot 2017-04-29 01:44:10 +02:00
vendorcode Kconfig: provide MAINBOARD_HAS_TPM_CR50 option 2017-04-24 22:02:55 +02:00
Kconfig include: Add xmalloc, xzmalloc and dma routines 2017-04-25 00:52:03 +02:00