Kyösti Mälkki cd7a70f487 soc/intel: Use common romstage code ... This provides stack guards with checking and common entry into postcar. The code in cpu/intel/car/romstage.c is candidate for becoming architectural so function prototype is moved to <arch/romstage.h>. Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2019-08-26 21:08:41 +00:00
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ga-945gcm-s2l	soc/intel: Use common romstage code	2019-08-26 21:08:41 +00:00
ga-b75m-d3h	sb/intel/{bd82x6x|ibexpeak}: Drop p_cnt_throttling_supported	2019-07-19 15:06:23 +00:00
ga-g41m-es2l	soc/intel: Use common romstage code	2019-08-26 21:08:41 +00:00
ga-h61m-s2pv	mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant	2019-06-24 12:13:46 +00:00
ma78gm	amdfam10: Declare get_sysinfo()	2019-07-04 04:14:22 +00:00
ma785gm	amdfam10: Declare get_sysinfo()	2019-07-04 04:14:22 +00:00
ma785gmt	amdfam10: Declare get_sysinfo()	2019-07-04 04:14:22 +00:00
Kconfig	tree: drop last paragraph of GPL copyright header	2015-10-31 21:37:39 +01:00
Kconfig.name	kconfig: automatically include mainboards	2015-04-18 08:31:08 +02:00