coreboot-kgpe-d16/src/mainboard/gigabyte/ga-945gcm-s2l
Kyösti Mälkki cd7a70f487 soc/intel: Use common romstage code
This provides stack guards with checking and common
entry into postcar.

The code in cpu/intel/car/romstage.c is candidate
for becoming architectural so function prototype
is moved to <arch/romstage.h>.

Change-Id: I4c5a9789e7cf3f7f49a4a33e21dac894320a9639
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34893
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-08-26 21:08:41 +00:00
..
acpi sb/intel/i82801{g,j}x: Automatically generate ACPI PIRQ tables 2018-06-29 07:45:30 +00:00
variants mb/gigabyte/ga-945gcm-s2c: Add mainboard using variants 2016-11-30 00:20:45 +01:00
acpi_tables.c mb/*/*/acpi_tables.c: Remove unneeded includes 2018-06-11 08:52:53 +00:00
board_info.txt
cmos.default nb/intel/i945: Use parallel MP init 2019-01-23 14:46:36 +00:00
cmos.layout nb/intel/i945: Use parallel MP init 2019-01-23 14:46:36 +00:00
cstates.c src/mainboard/*/*/cstates.c: Drop unused includes 2019-03-13 04:21:52 +00:00
data.vbt mb/*/*: Add a few VBT files 2018-06-06 14:58:21 +00:00
devicetree.cb mb/,sb/intel/i82801gx: Merge ide_legacy_combined into sata_mode 2019-07-20 15:27:01 +00:00
dsdt.asl mb: Set coreboot as DSDT's manufacturer model ID 2018-11-23 11:00:40 +00:00
gpio.c sb/ich7: Use common/gpio.h to set up GPIOs 2017-01-06 18:14:00 +01:00
hda_verb.c
Kconfig nb/i945: Drop CHANNEL_XOR_RANDOMIZATION selection 2019-06-14 18:07:30 +00:00
Kconfig.name mb/gigabyte/ga-945gcm-s2c: Add mainboard using variants 2016-11-30 00:20:45 +01:00
Makefile.inc sb/ich7: Use common/gpio.h to set up GPIOs 2017-01-06 18:14:00 +01:00
romstage.c soc/intel: Use common romstage code 2019-08-26 21:08:41 +00:00