Jon Murphy cd93e8e67f soc/amd/picasso: Add counter initializers ... Some counters are not being initialized and are relying on mainboards to set their values. If the mainboards have not implemented these functions it leads to indeterminate behavior. BUG=b:224987813 TEST=builds Signed-off-by: Jon Murphy <jpmurphy@google.com> Change-Id: I14903980fd921cad24c39cadd533349c14cc1cd3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2022-03-17 17:39:08 +00:00
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cezanne	soc/amd/{common/vboot,cezanne}: Copy S0i3 verstage logs into cbmem	2022-03-10 17:23:35 +00:00
common	soc/amd/common/block: Add mainboard_handle_smi	2022-03-16 16:33:32 +00:00
picasso	soc/amd/picasso: Add counter initializers	2022-03-17 17:39:08 +00:00
sabrina	soc/amd/sabrina: Add counter initializers	2022-03-17 17:38:54 +00:00
stoneyridge	soc/amd/*/lpc: rename SPIROM_BASE_ADDRESS_REGISTER	2022-03-09 19:01:15 +00:00
Kconfig