Having some symmetry with <soc/nvs.h> now allows to reduce the amount of gluelogic to determine the size and cbmc field of struct global_nvs. Since GNVS creation is now controlled by ACPI_SOC_NVS, drivers/amd/agesa/nvs.c becomes obsolete and soc/amd/cezanne cannot have this selected until <soc/nvs.h> exists. Change-Id: Ia9ec853ff7f5e7908f7e8fc179ac27d0da08e19d Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49344 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Lance Zhao
47 lines
1,015 B
C
47 lines
1,015 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include <acpi/acpi_gnvs.h>
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#include <device/device.h>
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#include <soc/nvs.h>
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#include "thermal.h"
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void mainboard_fill_gnvs(struct global_nvs *gnvs)
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{
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/* Enable Front USB ports in S3 by default */
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gnvs->s3u0 = 1;
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gnvs->s3u1 = 1;
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/*
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* Enable Front USB ports in S5 by default
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* to be consistent with back port behavior
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*/
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gnvs->s5u0 = 1;
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gnvs->s5u1 = 1;
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gnvs->f4of = FAN4_THRESHOLD_OFF;
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gnvs->f4on = FAN4_THRESHOLD_ON;
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gnvs->f4pw = FAN4_PWM;
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gnvs->f3of = FAN3_THRESHOLD_OFF;
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gnvs->f3on = FAN3_THRESHOLD_ON;
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gnvs->f3pw = FAN3_PWM;
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gnvs->f2of = FAN2_THRESHOLD_OFF;
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gnvs->f2on = FAN2_THRESHOLD_ON;
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gnvs->f2pw = FAN2_PWM;
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gnvs->f1of = FAN1_THRESHOLD_OFF;
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gnvs->f1on = FAN1_THRESHOLD_ON;
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gnvs->f1pw = FAN1_PWM;
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gnvs->f0of = FAN0_THRESHOLD_OFF;
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gnvs->f0on = FAN0_THRESHOLD_ON;
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gnvs->f0pw = FAN0_PWM;
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gnvs->tcrt = CRITICAL_TEMPERATURE;
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gnvs->tpsv = PASSIVE_TEMPERATURE;
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gnvs->tmax = MAX_TEMPERATURE;
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gnvs->flvl = 5;
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}
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