2715cdb3f3
This patch creates a common instance of sleepstates.asl inside intel common code (southbridge/intel/common/acpi) and asks all IA CPU/SOC code to refer sleepstates.asl from common code block. TEST=Able to build and boot Hatch and ICL DE system. Dump DSDT.asl to verify S0/S3/S4/S5 entries after booting to OS. Change-Id: Ie2132189f91211df74f8b5546da63ded4fdf687a Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36463 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
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|---|---|---|
| .. | ||
| dptf.asl | ||
| globalnvs.asl | ||
| gpio.asl | ||
| gpiolib.asl | ||
| lpss.asl | ||
| northbridge.asl | ||
| pch_hda.asl | ||
| pci_irqs.asl | ||
| pcie.asl | ||
| pcie_port.asl | ||
| platform.asl | ||
| pmc_ipc.asl | ||
| scs.asl | ||
| soc_int.asl | ||
| southbridge.asl | ||
| xhci.asl | ||
| xhci_apl_ports.asl | ||
| xhci_glk_ports.asl | ||