Raul E Rangel d373d5d92f soc/amd/common/block/lpc/spi_dma: Implement SPI DMA functionality ... This change will make it so the standard rdev readat call will use the SPI DMA controller if the alignment is correct, and the transfer size is larger than 64 bytes. There is a magic bit that needs to be set for the SPI DMA controller to function correctly. This is only available in RN/CZN+. BUG=b:179699789 TEST=Boot guybrush to OS. This reduces loading verstage by 40ms, verifying RW by 500us and loading romstage by 500 us. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I0be555956581fd82bbe1482d8afa8828c61aaa01 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56228 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>		2021-07-18 00:24:09 +00:00
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acpi	soc/amd/picasso/acpi/cpu: move WAL1 method that calls ALIB to common	2021-05-08 18:21:25 +00:00
block	soc/amd/common/block/lpc/spi_dma: Implement SPI DMA functionality	2021-07-18 00:24:09 +00:00
fsp	soc/amd/common/fsp/dmi.c: Fix Type 17 DMI reporting	2021-06-30 04:47:13 +00:00
psp_verstage	cezanne/psp_verstage: add reset/timer svc	2021-06-07 05:16:20 +00:00
vboot	amd/vboot: remove bl_syscall_public.h from include	2021-04-23 16:33:44 +00:00
Kconfig.common	soc/amd/picasso: Move Type 17 DMI generation to common	2021-06-13 09:55:30 +00:00
Makefile.inc	soc/amd/picasso: move chipset_handle_reset to common	2020-12-11 17:44:19 +00:00