Aaron Durbin 2a07a4d62b soc/intel/fsp_baytrail: convert to using common MP and SMM init ... In order to reduce duplication of code use the common MP and SMM initialization flow. Change-Id: I709ea938b720f26b351a1f950593efe077edb997 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14581 Tested-by: build bot (Jenkins) Reviewed-by: Ben Gardner <gardner.ben@gmail.com>		2016-05-04 18:52:46 +02:00
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acpi	acpi/: add missing license header	2016-01-14 22:52:11 +01:00
arch	arch/x86: Drop CBFS_BASE_ADDRESS	2016-05-03 11:41:55 +02:00
commonlib	ensure correct byte ordering for cbfs segment list	2016-04-25 23:30:00 +02:00
console	arch/x86: introduce postcar stage/phase	2016-03-23 14:24:30 +01:00
cpu	cpu/x86: combine multiprocessor and SMM initialization	2016-05-04 18:51:49 +02:00
device	payloads: add iPXE 'payload' build	2016-04-13 17:45:37 +02:00
drivers	drivers/intel/fsp1_1: fix linking romstage when SEPARATE_VERSTAGE used	2016-05-02 20:06:58 +02:00
ec	kbuild: Allow drivers to fit src/drivers/[X]/[Y]/ scheme	2016-04-19 18:34:18 +02:00
include	cpu/x86: combine multiprocessor and SMM initialization	2016-05-04 18:51:49 +02:00
lib	lib/cbfs: Use fmap derived information about the COREBOOT region	2016-05-03 19:00:36 +02:00
mainboard	mainboard/intel/galileo: Enable I2C and GPIO	2016-05-03 22:53:41 +02:00
northbridge	nb/amd/mct_ddr3: Only initialize ECC bits once	2016-05-02 16:17:52 +02:00
soc	soc/intel/fsp_baytrail: convert to using common MP and SMM init	2016-05-04 18:52:46 +02:00
southbridge	southbridge/amd: Drop HUDSON_FWM_INSIDE_CBFS	2016-05-03 11:41:07 +02:00
superio	superio/smsc/mec1308: Fix AddressMax value for SMBX mailbox	2016-04-13 23:39:28 +02:00
vendorcode	vendorcode/intel/fsp/fsp1_1/quark: Update FspUpdVpd.h	2016-05-03 22:53:20 +02:00
Kconfig	lib/coreboot_table: use the architecture dependent table size	2016-05-02 20:03:34 +02:00