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coreboot-kgpe-d16/src/mainboard/supermicro/h8dmr_fam10
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Myles Watson d73c1b5bf1 Define some variables that were not defined. There are a couple left. 
Do kbuildall then grep not.defined kbuildall.results/*
The interesting ones were GENERATE_*  I had to put them in twice to make it work
correctly: once outside the menu setting the defaults, and once inside the menu.
Now they show up when they should, and are always defined

Define HAVE_INIT_TIMER to only exclude the three boards that define it to be 0
in newconfig.
Define MEM_TRAIN_SEQ to be an integer and set it correctly.
Remove CAR_FAM10 and just depend on NORTHBRIDGE_AMD_AMDFAM10
MOVNTI is a performance enhancement, and should default to 0 so it doesn't break
boards that forget to define it.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-10-26 15:14:07 +00:00
..
apc_auto.c Change CONFIG_LB_MEM_TOPK to CONFIG_RAMTOP to match CONFIG_RAMBASE. 2009-10-16 16:32:57 +00:00
cache_as_ram_auto.c Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
chip.h Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
cmos.layout Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
Config.lb Major cleanups of the hard_reset() code and config in coreboot. 2009-10-24 19:17:24 +00:00
devicetree.cb Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
get_bus_conf.c Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
irq_tables.c Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
Kconfig Define some variables that were not defined. There are a couple left. 2009-10-26 15:14:07 +00:00
mainboard.c Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
Makefile.inc Add CONFIG_GENERATE_* for tables so that the user can select which tables not 2009-10-15 13:35:47 +00:00
mb_sysconf.h Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
mptable.c Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
Options.lb Define some variables that were not defined. There are a couple left. 2009-10-26 15:14:07 +00:00
README Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00
resourcemap.c Define some variables that were not defined. There are a couple left. 2009-10-26 15:14:07 +00:00
spd_addr.h Add supermicro h8dmr fam10 target. This is largely a mashup of the tyan s2912 2009-09-30 14:46:43 +00:00

README 


There are a number of outstanding issues:

* we don't have the mc_patch_01000086.h CPU ucode file yet which is
referenced in a comment in src/mainboard/supermicro/h8dmr_fam10/Options.lb.
AMD has not released it yet. This is not a problem specific to this port.

* I'm seeing toolchain issues. I can't get this tree to compile correctly with
gcc 4.3 (32 bit) - there is an optimization issue where certain parts of the
CBFS code execute very slowly. With gcc 3.4 (32 bit) that slowness
disappears. This is probably not a problem related to this port specifically.

* setting CONFIG_DEFAULT_CONSOLE_LOGLEVEL lower than 8 simply hangs the boot
shortly after the warm reset triggered by the MCP55 code. I think this too
might be a toolchain problem (but I see it on gcc 3.4 as well as 4.3).

* during startup, the CPU cores talk through each other on serial for a
while. Again, not an issue specific to this port.

* to avoid very slow LZMA decompression I use this port with LZMA compression
disabled in CBFS. I'm not sure what's causing this particular slowness.

See also this thread: http://www.coreboot.org/pipermail/coreboot/2009-September/052107.html

Ward, 2009-09-22

mansoor@iwavesystems.com said, about the last issue:

  Try enabling CONFIG_XIP_ROM_BASE.  It solved the same problem for me in my board.

So, that's a todo.