da94e171b5
The SATA device moved from 0:1f.2 to 0:17.0, 0:1f.2 became PMC. We detect that by checking the PCI device class. The ABAR MMIO space has grown to 2KiB and up to 8 ports are supported now. For backwards compatibility, only dump port registers of ports that are enabled in the Ports Implemented (PI) register. Change-Id: I8e0f07d7359d92f689882b5afefa5ffb3766ee8b Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19584 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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| .. | ||
| ahci.c | ||
| amb.c | ||
| cpu.c | ||
| gfx.c | ||
| gpio.c | ||
| inteltool.8 | ||
| inteltool.c | ||
| inteltool.h | ||
| ivy_memory.c | ||
| Makefile | ||
| memory.c | ||
| pcie.c | ||
| powermgt.c | ||
| rootcmplx.c | ||
| spi.c | ||