cf544ac1f9
The workarounds in ACPI methods for D0/D3 transition that are used on haswell/LPT do not all apply to broadwell/WPT. BUG=chrome-os-partner:28234 BRANCH=broadwell TEST=build and boot on samus, test USB functionality and wake and ensure the device still does into D3 state Change-Id: Ic3a75f5bf50e826ade7d942b48cfebb75cf976e6 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Original-Commit-Id: 1b54d105957ee80ca34048c42fb8f241731281cf Original-Change-Id: I877afd51fc6c9b7906e923b893fc31bdf2cd1090 Original-Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/240850 Original-Reviewed-by: Shawn N <shawnn@chromium.org> Reviewed-on: http://review.coreboot.org/9488 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> |
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adsp.asl | ||
cpu.asl | ||
ctdp.asl | ||
device_nvs.asl | ||
ehci.asl | ||
globalnvs.asl | ||
gpio.asl | ||
hda.asl | ||
irqlinks.asl | ||
lpc.asl | ||
pch.asl | ||
pci_irqs.asl | ||
pcie.asl | ||
pcie_port.asl | ||
platform.asl | ||
sata.asl | ||
serialio.asl | ||
sleepstates.asl | ||
smbus.asl | ||
systemagent.asl | ||
xhci.asl |