No description
ddb7a9d4a1
- add a 'quiet' mode that only prints important messages - add vendor/mainboard to all strings printed With quiet on, multithreaded looks like this: skipping google/storm because we're missing compilers for (arm armv4 armv7) iwill/dk8_htx built successfully. (took 5s) jetway/j7f2 built successfully. (took 6s) iwill/dk8x built successfully. (took 8s) iwill/dk8s2 built successfully. (took 8s) jetway/j7f4k1g5d built successfully. (took 10s) With quiet off, single threaded now looks like this: Building intel/emeraldlake2 Creating config file for intel/emeraldlake2... intel/emeraldlake2 (blobs, ccache) intel/emeraldlake2 config created. Compiling intel/emeraldlake2 image... intel/emeraldlake2 built successfully. (took 5s) And quiet off multithreaded looks like this: Building iwill/dk8_htx Creating config file for iwill/dk8_htx... iwill/dk8_htx (blobs, ccache) intel/mohonpeak config created. Compiling intel/mohonpeak image on 1 cpu... intel/minnowmax config created. --- snip --- intel/mtarvon built successfully. (took 4s) Building iwill/dk8s2 Creating config file for iwill/dk8s2... iwill/dk8s2 (blobs, ccache) intel/mohonpeak built successfully. (took 5s) Building iwill/dk8x Change-Id: Ib7b9a625d77bb8e0663afc00d7133e415866ecec Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7716 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> |
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3rdparty@9f68e20e5e | ||
documentation | ||
payloads | ||
src | ||
util | ||
.gitignore | ||
.gitmodules | ||
.gitreview | ||
COPYING | ||
Makefile | ||
Makefile.inc | ||
README | ||
toolchain.inc |
------------------------------------------------------------------------------- coreboot README ------------------------------------------------------------------------------- coreboot is a Free Software project aimed at replacing the proprietary BIOS (firmware) found in most computers. coreboot performs a little bit of hardware initialization and then executes additional boot logic, called a payload. With the separation of hardware initialization and later boot logic, coreboot can scale from specialized applications that run directly firmware, run operating systems in flash, load custom bootloaders, or implement firmware standards, like PC BIOS services or UEFI. This allows for systems to only include the features necessary in the target application, reducing the amount of code and flash space required. coreboot was formerly known as LinuxBIOS. Payloads -------- After the basic initialization of the hardware has been performed, any desired "payload" can be started by coreboot. See http://www.coreboot.org/Payloads for a list of supported payloads. Supported Hardware ------------------ coreboot supports a wide range of chipsets, devices, and mainboards. For details please consult: * http://www.coreboot.org/Supported_Motherboards * http://www.coreboot.org/Supported_Chipsets_and_Devices Build Requirements ------------------ * gcc / g++ * make Optional: * doxygen (for generating/viewing documentation) * iasl (for targets with ACPI support) * gdb (for better debugging facilities on some targets) * ncurses (for 'make menuconfig') * flex and bison (for regenerating parsers) Building coreboot ----------------- Please consult http://www.coreboot.org/Build_HOWTO for details. Testing coreboot Without Modifying Your Hardware ------------------------------------------------ If you want to test coreboot without any risks before you really decide to use it on your hardware, you can use the QEMU system emulator to run coreboot virtually in QEMU. Please see http://www.coreboot.org/QEMU for details. Website and Mailing List ------------------------ Further details on the project, a FAQ, many HOWTOs, news, development guidelines and more can be found on the coreboot website: http://www.coreboot.org You can contact us directly on the coreboot mailing list: http://www.coreboot.org/Mailinglist Copyright and License --------------------- The copyright on coreboot is owned by quite a large number of individual developers and companies. Please check the individual source files for details. coreboot is licensed under the terms of the GNU General Public License (GPL). Some files are licensed under the "GPL (version 2, or any later version)", and some files are licensed under the "GPL, version 2". For some parts, which were derived from other projects, other (GPL-compatible) licenses may apply. Please check the individual source files for details. This makes the resulting coreboot images licensed under the GPL, version 2.