coreboot-kgpe-d16/src/cpu
Arthur Heymans aacd548c26 cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4E
The datasheets "Intel® Core™ Duo Processor and Intel® Core™ Solo
Processor on 65 nm Process" mentions cpu C-states substates which can
either be attained by adding a substate hint to the MWAIT/P_LVLx request
or automatically by setting some msr bits correctly.

This just sets the same msr bits as model_6fx to enable
dynamic L2 cache, C2E and C4E acpi cpu states.

The result is that when limiting a thinkpad x60 with a yonah T2400
cpu to the acpi cpu C2 state, the idle power usage drops from 18W to
14W. When the lowest C-state is set to C4 the idle power usage seems
to remain similar.

Change-Id: I6c422656ace04659f32082a5944617eda6c79ec3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/16901
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-09 21:37:50 +02:00
..
allwinner src/cpu: Remove unnecessary whitespace 2016-10-07 18:08:25 +02:00
amd src/cpu: Remove unnecessary whitespace 2016-10-07 18:08:25 +02:00
armltd
dmp src/cpu: Improve code formatting 2016-09-04 05:33:04 +02:00
intel cpu/intel/model_6ex: Set msr bits for dynamic L2, C2E, C4E 2016-10-09 21:37:50 +02:00
qemu-power8 cpu/qemu-power8: don't enable it for qemu-x86 2016-02-19 20:03:52 +01:00
qemu-x86 qemu-x86: Enable SMP support 2015-12-08 15:54:27 +01:00
ti Kconfig: lay groundwork for not assuming SPI flash boot device 2016-08-18 06:18:21 +02:00
via src/cpu: Remove unnecessary whitespace 2016-10-07 18:08:25 +02:00
x86 src/cpu: Remove unnecessary whitespace 2016-10-07 18:08:25 +02:00
Kconfig Kconfig: Add option for microcode filenames 2016-09-08 00:29:08 +02:00
Makefile.inc cpu: Add a way to use microcode .h files back to the build 2015-11-10 19:22:40 +01:00