coreboot-kgpe-d16/src
Patrick Rudolph ded0c77d48 Coverity: Fix CID1393976
Cast to u64 to prevent possible integer overflow.

Change-Id: I5c7d25278db54523242314cba6c85ac2f7a6c1f3
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/27447
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-07-12 15:22:06 +00:00
..
acpi
arch riscv: add include/arch/smp/ directory 2018-07-12 11:53:30 +00:00
commonlib src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:26:18 +00:00
console arch/x86: Drop leftover ROMCC console support 2018-06-08 03:31:12 +00:00
cpu src/{arch,commonlib,cpu}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:26:18 +00:00
device src/{device,drivers}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:27:34 +00:00
drivers src/{device,drivers}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:27:34 +00:00
ec src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:28:35 +00:00
include src/{ec,include,lib}: Use "foo *bar" instead of "foo* bar" 2018-07-09 09:28:35 +00:00
lib Coverity: Fix CID1393979 2018-07-12 15:21:10 +00:00
mainboard soc/intel/braswell/acpi/dptf/thermal.asl: Make Thermal event optional 2018-07-12 11:52:23 +00:00
northbridge nb/i945/raminit: Correct C0DRAMW & C1DRAMW for 4 DIMMs 2018-07-12 11:52:52 +00:00
security src: Add missing license headers 2018-07-06 15:30:59 +00:00
soc Coverity: Fix CID1393976 2018-07-12 15:22:06 +00:00
southbridge src/sb/amd/pi/hudson/sd.c: disable SDR50 tuning and set correct clock freq in SD2.0 mode 2018-07-10 09:53:22 +00:00
superio superio: move files to match the common naming scheme 2018-07-06 16:47:21 +00:00
vendorcode Coverity: Fix CID1393978 2018-07-12 15:21:36 +00:00
Kconfig stage_cache: Disable when APCI S3 is not possible 2018-06-27 02:20:11 +00:00