df092c1ded
We were not adding power management handling of GPIO_COM3 in gpio.asl This can affect s0ix flow where platform won't go into s0ix since GPIO_COM3 is not power gated. BUG=b:188392183 BRANCH=None TEST=Platform should enter to s0ix and GPIO COMM3 should not block an entry to s0ix. Change-Id: I3f269c66bdd6337adb0d2bd29d0b7d72ced19ec4 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/54391 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> |
||
---|---|---|
.. | ||
alderlake | ||
apollolake | ||
baytrail | ||
braswell | ||
broadwell | ||
cannonlake | ||
common | ||
denverton_ns | ||
elkhartlake | ||
icelake | ||
jasperlake | ||
quark | ||
skylake | ||
tigerlake | ||
xeon_sp | ||
Kconfig |