coreboot-kgpe-d16/src/soc
Alexandru Gagniuc dfc2b31517 soc/apollolake: Add initial cache-as-ram setup for bootblock
This is the minimum setup needed to both get cache-as-ram setup and a
C environment working. On apollolake, we only get 32 KiB of data
loaded into an SRAM that is readonly to the main CPU. Due to this
restriction we have to set CAR and a C environment very early on.

Change-Id: I65c51f972580609d2c1f03dfe2a86bc5d45d1e46
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/13301
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
2016-02-11 21:00:07 +01:00
..
broadcom/cygnus src/: Chmod 644 all .c, .h, .asl, .inc, .cb, .hex, & Kconfig files 2016-01-29 16:57:11 +01:00
imgtec/pistachio imgtec/pistachio: disable default RPU gate register values 2015-12-31 17:36:06 +01:00
intel soc/apollolake: Add initial cache-as-ram setup for bootblock 2016-02-11 21:00:07 +01:00
marvell util/marvell: Add Marvell doimage utility and dependency in relevant Makefile 2016-02-11 14:16:08 +01:00
mediatek/mt8173 mediatek/mt8173: revise cbmem_top 2016-01-22 22:15:38 +01:00
nvidia header files: Fix guard name comments to match guard names 2016-01-18 04:07:53 +01:00
qualcomm/ipq806x header files: Fix guard name comments to match guard names 2016-01-18 04:07:53 +01:00
rockchip/rk3288 rockchip/rk3288: UART uses 32bit wide registers 2016-02-09 21:53:22 +01:00
samsung header files: Fix guard name comments to match guard names 2016-01-18 04:07:53 +01:00
ucb/riscv tree: drop last paragraph of GPL copyright header 2015-10-31 21:37:39 +01:00