Hung-Te Lin e29e2ff8e8 Include byteorder.h for the definition of ntohl in romstage.c ... A fix to eliminate warnings when building romstage files with ChromeOS compilers Change-Id: Ia5d7bbdde3aa3439fd493f5795f2cc2bf4c4c187 Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: http://review.coreboot.org/2781 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>		2013-03-19 05:26:29 +01:00
..
arch	x86 intel: Add Firmware Interface Table support	2013-03-17 22:53:51 +01:00
console	Eliminate do_div().	2013-03-08 23:14:26 +01:00
cpu	haswell: wait 10ms after INIT IPI	2013-03-19 05:26:12 +01:00
device	Google Link: Add remaining code to support native graphics	2013-03-15 20:21:51 +01:00
drivers	GPLv2 notice: Unify all files to just use one space in »MA 02110-1301«	2013-03-01 10:16:08 +01:00
ec	Support ITE IT8518 embedded controller running Quanta's firmware	2013-03-14 04:54:21 +01:00
include	intel microcode: split up microcode loading stages	2013-03-19 05:11:50 +01:00
lib	rmodule: include heap in bss section	2013-03-18 18:51:28 +01:00
mainboard	Include byteorder.h for the definition of ntohl in romstage.c	2013-03-19 05:26:29 +01:00
northbridge	haswell: move call site of save_mrc_data()	2013-03-18 20:50:15 +01:00
southbridge	lynxpoint: Move a bit of generic RCBA into early_pch	2013-03-18 18:49:07 +01:00
superio	Super I/O W83627DHG: Enable UART B by redirecting pins	2013-03-15 17:51:48 +01:00
vendorcode	google/snow: rename a file so that it is clear what board it is for	2013-03-16 04:07:35 +01:00
Kconfig	lib: add rmodule support	2013-03-18 18:40:34 +01:00