eb50c7d922
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com> Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
93 lines
1.6 KiB
Text
93 lines
1.6 KiB
Text
config BOARD_IWILL_DK8X
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bool "DK8X"
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select ARCH_X86
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select CPU_AMD_SOCKET_940
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select NORTHBRIDGE_AMD_AMDK8
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select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
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select SOUTHBRIDGE_AMD_AMD8111
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select SOUTHBRIDGE_AMD_AMD8131
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select SUPERIO_WINBOND_W83627THF
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select HAVE_OPTION_TABLE
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select HAVE_PIRQ_TABLE
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select HAVE_MP_TABLE
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select USE_PRINTK_IN_CAR
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select USE_DCACHE_RAM
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select HAVE_HARD_RESET
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select SB_HT_CHAIN_UNITID_OFFSET_ONLY
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select WAIT_BEFORE_CPUS_INIT
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select BOARD_ROMSIZE_KB_512
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config MAINBOARD_DIR
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string
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default iwill/dk8x
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depends on BOARD_IWILL_DK8X
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config DCACHE_RAM_BASE
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hex
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default 0xc8000
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depends on BOARD_IWILL_DK8X
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config DCACHE_RAM_SIZE
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hex
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default 0x08000
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depends on BOARD_IWILL_DK8X
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config DCACHE_RAM_GLOBAL_VAR_SIZE
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hex
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default 0x01000
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depends on BOARD_IWILL_DK8X
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config APIC_ID_OFFSET
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hex
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default 0x0
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depends on BOARD_IWILL_DK8X
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config MAINBOARD_PART_NUMBER
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string
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default "DK8X"
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depends on BOARD_IWILL_DK8X
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config HW_MEM_HOLE_SIZEK
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hex
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default 0x100000
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depends on BOARD_IWILL_DK8X
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config MAX_CPUS
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int
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default 2
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depends on BOARD_IWILL_DK8X
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config MAX_PHYSICAL_CPUS
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int
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default 2
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depends on BOARD_IWILL_DK8X
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config HW_MEM_HOLE_SIZE_AUTO_INC
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bool
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default n
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depends on BOARD_IWILL_DK8X
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config SB_HT_CHAIN_ON_BUS0
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int
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default 0
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depends on BOARD_IWILL_DK8X
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config HT_CHAIN_END_UNITID_BASE
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hex
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default 0x20
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depends on BOARD_IWILL_DK8X
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config HT_CHAIN_UNITID_BASE
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hex
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default 0x1
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depends on BOARD_IWILL_DK8X
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config SERIAL_CPU_INIT
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bool
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default n
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depends on BOARD_IWILL_DK8X
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config IRQ_SLOT_COUNT
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int
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default 9
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depends on BOARD_IWILL_DK8X
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