coreboot-kgpe-d16/src/mainboard/iwill/dk8x/Kconfig
Edwin Beasant eb50c7d922 Re-integrate "USE_OPTION_TABLE" code.
Signed-off-by: Edwin Beasant <edwin_beasant@virtensys.com>
Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Myles Watson <mylesgw@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-07-06 21:05:04 +00:00

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Text

config BOARD_IWILL_DK8X
bool "DK8X"
select ARCH_X86
select CPU_AMD_SOCKET_940
select NORTHBRIDGE_AMD_AMDK8
select NORTHBRIDGE_AMD_AMDK8_ROOT_COMPLEX
select SOUTHBRIDGE_AMD_AMD8111
select SOUTHBRIDGE_AMD_AMD8131
select SUPERIO_WINBOND_W83627THF
select HAVE_OPTION_TABLE
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
string
default iwill/dk8x
depends on BOARD_IWILL_DK8X
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_IWILL_DK8X
config DCACHE_RAM_SIZE
hex
default 0x08000
depends on BOARD_IWILL_DK8X
config DCACHE_RAM_GLOBAL_VAR_SIZE
hex
default 0x01000
depends on BOARD_IWILL_DK8X
config APIC_ID_OFFSET
hex
default 0x0
depends on BOARD_IWILL_DK8X
config MAINBOARD_PART_NUMBER
string
default "DK8X"
depends on BOARD_IWILL_DK8X
config HW_MEM_HOLE_SIZEK
hex
default 0x100000
depends on BOARD_IWILL_DK8X
config MAX_CPUS
int
default 2
depends on BOARD_IWILL_DK8X
config MAX_PHYSICAL_CPUS
int
default 2
depends on BOARD_IWILL_DK8X
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n
depends on BOARD_IWILL_DK8X
config SB_HT_CHAIN_ON_BUS0
int
default 0
depends on BOARD_IWILL_DK8X
config HT_CHAIN_END_UNITID_BASE
hex
default 0x20
depends on BOARD_IWILL_DK8X
config HT_CHAIN_UNITID_BASE
hex
default 0x1
depends on BOARD_IWILL_DK8X
config SERIAL_CPU_INIT
bool
default n
depends on BOARD_IWILL_DK8X
config IRQ_SLOT_COUNT
int
default 9
depends on BOARD_IWILL_DK8X