coreboot-kgpe-d16/src/soc
Felix Held e4b65cc945 soc/amd/common/data_fabric/domain: write _BBN method in SSDT
Instead of having PCI0's _BBN method in the DSDT that always returns 0,
use acpigen_write_BBN to generate the _BBN method that returns the first
PCI bus number in the PCI domain/host bridge.

TEST=On mandolin the _BBN method in the _SB/PCI0 scope is now in the
SSDT instead of the DSDT, but still returns 0.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I8badeb0064b498d3f18217ea24bff73676913b02
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74992
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2023-06-07 00:16:58 +00:00
..
amd soc/amd/common/data_fabric/domain: write _BBN method in SSDT 2023-06-07 00:16:58 +00:00
cavium soc/cavium/cn81xx: Use correct size for MPIDR_EL1 register 2023-05-13 17:22:16 +00:00
example/min86
intel soc/intel/common/crashlog: Add support for IOE die 2023-06-06 17:34:53 +00:00
mediatek mb/google/geralt: Fix MIPI panel power on/off sequence 2023-06-06 12:16:26 +00:00
nvidia treewide: stop calling custom TPM log "TCPA" 2023-01-11 16:00:55 +00:00
qualcomm treewide: Remove 'extern' from functions declaration 2023-05-26 13:45:24 +00:00
rockchip
samsung treewide: Fix old-style declarations 2023-01-17 04:23:49 +00:00
sifive/fu540 soc/sifive: Comment out set but unused variables 2023-06-04 19:22:50 +00:00
ti
ucb/riscv