coreboot-kgpe-d16/src
Tan, Lean Sheng e8e6d8610c vendorcode/intel/fsp: Add Elkhart Lake FSP headers for FSP v2341
The FSP-M/S/T related headers added are generated as per FSP v2341.

Signed-off-by: Tan, Lean Sheng <lean.sheng.tan@intel.com>
Change-Id: I98f738402490b47efa1a346f81db47857e384e13
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47803
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2020-12-02 10:44:57 +00:00
..
acpi src/acpi/acpigen: Add NULL pointer check 2020-12-02 06:07:05 +00:00
arch arch/x86/car.ld: Check for out of bound on no-XIP stages 2020-12-02 10:41:00 +00:00
commonlib cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
console console: Override uart base address 2020-11-09 07:46:10 +00:00
cpu cpu/x86/early_reset: Mark assemblycode as 32bit 2020-12-01 16:00:40 +00:00
device device: Drop unused HyperTransport code 2020-11-25 09:11:46 +00:00
drivers drivers/aspeed/common/ast: Fix compilation under x86_64 2020-12-01 16:01:31 +00:00
ec ec/google/chromeec/acpi: Make OperationRegion brace align 2020-12-01 08:00:23 +00:00
include include/device/pci_ids.h: Fix device id for gspi2 2020-11-30 08:07:00 +00:00
lib lib/reg_script: Add cast to fix compilation on x86_64 2020-12-01 16:00:57 +00:00
mainboard mb/google/dedede/var/drawcia: Support VBT for Drawman 2020-12-02 10:42:52 +00:00
northbridge nb/amd: Deduplicate nb_common.h 2020-11-25 09:11:58 +00:00
security cbfs: Add metadata cache 2020-11-21 10:43:53 +00:00
soc soc/intel/elkhartlake: Update Kconfig 2020-12-02 10:44:48 +00:00
southbridge soc/amd/common: introduce SOC_AMD_COMMON_BLOCK_PCI_MMCONF 2020-11-30 16:27:52 +00:00
superio superio/smsc/sio1036: Support 16-bit IO port addressing 2020-11-18 13:12:11 +00:00
vendorcode vendorcode/intel/fsp: Add Elkhart Lake FSP headers for FSP v2341 2020-12-02 10:44:57 +00:00
Kconfig soc/intel/xeon_sp: Move function debug macros 2020-10-29 16:44:19 +00:00