a09760eb45
On x86, coreboot may allocate a variable range MTRR for enabling caching of the system ROM. Add the ability to parse this structure and add the result to the sysinfo structure. An example usage implementation would be to obtain the variable MTRR index that covers the ROM from the sysinfo structure. Then one would disable caching and change the MTRR type from uncacheable to write-protect and enable caching. The opposite sequence is required to tearn down the caching. Change-Id: I3bfe2028d8574d3adb1d85292abf8f1372cf97fa Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/2920 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
115 lines
3.1 KiB
C
115 lines
3.1 KiB
C
/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2008 Advanced Micro Devices, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#ifndef _SYSINFO_H
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#define _SYSINFO_H
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/* Allow a maximum of 16 memory range definitions. */
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#define SYSINFO_MAX_MEM_RANGES 16
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/* Allow a maximum of 8 GPIOs */
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#define SYSINFO_MAX_GPIOS 8
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#include <coreboot_tables.h>
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struct cb_serial;
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/*
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* All pointers in here shall be virtual.
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*
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* If a relocation happens after the last call to lib_get_sysinfo(),
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* it is up to the user to call lib_get_sysinfo() again.
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*/
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struct sysinfo_t {
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unsigned int cpu_khz;
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struct cb_serial *serial;
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unsigned short ser_ioport;
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unsigned long ser_base; // for mmapped serial
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int n_memranges;
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struct memrange {
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unsigned long long base;
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unsigned long long size;
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unsigned int type;
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} memrange[SYSINFO_MAX_MEM_RANGES];
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struct cb_cmos_option_table *option_table;
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u32 cmos_range_start;
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u32 cmos_range_end;
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u32 cmos_checksum_location;
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#ifdef CONFIG_CHROMEOS
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u32 vbnv_start;
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u32 vbnv_size;
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#endif
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char *version;
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char *extra_version;
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char *build;
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char *compile_time;
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char *compile_by;
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char *compile_host;
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char *compile_domain;
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char *compiler;
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char *linker;
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char *assembler;
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char *cb_version;
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struct cb_framebuffer *framebuffer;
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#ifdef CONFIG_CHROMEOS
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int num_gpios;
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struct cb_gpio gpios[SYSINFO_MAX_GPIOS];
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#endif
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unsigned long *mbtable; /** Pointer to the multiboot table */
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struct cb_header *header;
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struct cb_mainboard *mainboard;
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#ifdef CONFIG_CHROMEOS
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void *vboot_handoff;
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u32 vboot_handoff_size;
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void *vdat_addr;
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u32 vdat_size;
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#endif
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#ifdef CONFIG_ARCH_X86
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int x86_rom_var_mtrr_index;
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#endif
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void *tstamp_table;
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void *cbmem_cons;
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void *mrc_cache;
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};
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extern struct sysinfo_t lib_sysinfo;
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#endif
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