Corey Osgood f366ce05ef Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges. ... Both are tested and appear to be working, however I'm not 100% clear on if the NM10 has any other PCI IDs. Signed-off-by: Corey Osgood <corey.osgood@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1		2010-08-17 08:33:44 +00:00
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Makefile	Since some people disapprove of white space cleanups mixed in regular commits	2010-04-27 06:56:47 +00:00
cpu.c	inteltool: basic poulsbo sch support.	2010-06-01 10:04:28 +00:00
gpio.c	Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.	2010-08-17 08:33:44 +00:00
inteltool.8	Cosmetics, whitespace, coding style, partially ident-aided (trivial).	2008-05-14 21:20:55 +00:00
inteltool.c	Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.	2010-08-17 08:33:44 +00:00
inteltool.h	Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.	2010-08-17 08:33:44 +00:00
memory.c	add i945GSE to inteltool	2010-08-01 15:33:30 +00:00
pcie.c	add i945GSE to inteltool	2010-08-01 15:33:30 +00:00
powermgt.c	Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.	2010-08-17 08:33:44 +00:00
rootcmplx.c	Add support for the Intel NM10 (a variant of ICH7) and ICH8 southbridges.	2010-08-17 08:33:44 +00:00