068253c369
These files are being updated to match the prevailing style of cmos.default files. Change-Id: I47d31d6fec8c9eb856aed0c63824d9556b7705e4 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28051 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Martin Roth <martinroth@google.com>
29 lines
668 B
Text
29 lines
668 B
Text
debug_level=Debug
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multi_core=Enable
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slow_cpu=off
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compute_unit_siblings=Enable
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iommu=Enable
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nmi=Disable
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hypertransport_speed_limit=Auto
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max_mem_clock=DDR3-1600
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minimum_memory_voltage=1.5V
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dimm_spd_checksum=Enforce
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ECC_memory=Enable
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ECC_redirection=Enable
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ecc_scrub_rate=1.28us
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interleave_chip_selects=Enable
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interleave_nodes=Disable
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interleave_memory_channels=Enable
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cpu_c_states=Enable
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cpu_cc6_state=Enable
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cpu_core_boost=Enable
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sata_ahci_mode=Enable
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sata_alpm=Disable
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maximum_p_state_limit=0xf
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probe_filter=Auto
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l3_cache_partitioning=Disable
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gart=Enable
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ehci_async_data_cache=Enable
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experimental_memory_speed_boost=Disable
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power_on_after_fail=On
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boot_option=Fallback
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