Furquan Shaikh ea4ece61b6 soc/intel/apollolake: Enable UART debug controller on S3 resume ... 1. Add a new variable to GNVS to store information during S3 suspend whether UART debug controller is enabled. 2. On resume, read stored GNVS variable to decide if UART debug port controller needs to be initialized. 3. Provide helper functions required by intel/common UARRT driver for enabling controller on S3 resume. BUG=b:64030366 Change-Id: Idd17dd0bd3c644383f273b465a16add184e3b171 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/20888 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>		2017-08-10 16:25:14 +00:00
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amd	usbdebug: Refactor early enable	2017-08-07 12:35:42 +00:00
broadcom/cygnus	src/soc: add IS_ENABLED() around Kconfig symbol references	2017-07-16 19:22:25 +00:00
dmp/vortex86ex	soc/dmp/vortex86: Fix CMOS read and random RTC reset	2017-08-01 13:20:15 +00:00
imgtec/pistachio	Consolidate reset API, add generic reset_prepare mechanism	2017-06-13 20:53:09 +02:00
intel	soc/intel/apollolake: Enable UART debug controller on S3 resume	2017-08-10 16:25:14 +00:00
lowrisc/lowrisc	soc/lowrisc: Place CBMEM at top of autodetected RAM	2016-12-06 18:51:13 +01:00
marvell/mvmap2315	Update files with no newline at the end	2017-07-24 15:08:16 +00:00
mediatek/mt8173	src/soc: add IS_ENABLED() around Kconfig symbol references	2017-07-16 19:22:25 +00:00
nvidia	soc/nvidia/tegra*: force using our headers instead of compiler's/system's	2017-08-02 18:59:19 +00:00
qualcomm	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00
rockchip	rockchip: gpio: Correct rk3399 pmu gpio pull setting	2017-08-06 23:21:02 +00:00
samsung	Rename __attribute__((packed)) --> __packed	2017-07-13 19:45:59 +00:00
ucb/riscv	soc/ucb/riscv: Place CBMEM at top of autodetected RAM	2016-12-06 18:48:28 +01:00