coreboot-kgpe-d16/src/soc/intel
Gabe Black ec9293fb5a spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions.
They were only used internal to the SPI drivers and, according to the comment
next to their prototypes, were for when the SPI controller doesn't control the
chip select line directly and needs some help.

BUG=None
TEST=Built for link, falco, and rambi. Built and booted on peach_pit and nyan.
BRANCH=None

Original-Change-Id: If4622819a4437490797d305786e2436e2e70c42b
Original-Signed-off-by: Gabe Black <gabeblack@google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/192048
Original-Reviewed-by: Gabe Black <gabeblack@chromium.org>
Original-Tested-by: Gabe Black <gabeblack@chromium.org>
Original-Commit-Queue: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 1e2deecd9d8c6fd690c54f24e902cc7d2bab0521)
Signed-off-by: Marc Jones <marc.jones@se-eng.com>

Change-Id: Ida08cbc2be5ad09b929ca16e483c36c49ac12627
Reviewed-on: http://review.coreboot.org/7708
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins)
2014-12-09 20:32:18 +01:00
..
baytrail spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. 2014-12-09 20:32:18 +01:00
broadwell intel/broadwell: Spelling fixes 2014-12-08 05:38:54 +01:00
common baytrail: Move HDA verb table to Intel SOC common directory 2014-10-22 03:35:13 +02:00
fsp_baytrail spi: Eliminate the spi_cs_activate and spi_cs_deactivate functions. 2014-12-09 20:32:18 +01:00
Kconfig baytrail: Move MRC cache code to a common directory 2014-10-22 03:33:20 +02:00
Makefile.inc fsp_baytrail: Add the FSP version of Intel's Bay Trail-I chip 2014-05-29 23:10:36 +02:00