5468e94df1
Commit "BCRD2: Enable LPDDR3" with the Change-Id listed below contained additions to braswell's chip.h which were lost during merging. BRANCH=None BUG=None TEST=google/strago builds Change-Id: I995b788b6a308cefa23228544127bb1e384bbcc7 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Original-Commit-Id: 561edf23ab696772fd0a6af34cb435db9d96e912 Original-Change-Id: Ie08900bc62d517394412cc597274fb8f5b6b0f51 Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Original-Change-Id: I1cb5a03b77baf2df125b648dd75c9f8166f5571e Original-Original-Signed-off-by: Jenny TC <jenny.tc@intel.com> Original-Original-Signed-off-by: Divagar Mohandass <divagar.mohandass@intel.com> Original-Original-Reviewed-on: https://chromium-review.googlesource.com/282155 Original-Reviewed-on: https://chromium-review.googlesource.com/288880 Original-Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/11065 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> |
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.. | ||
acpi | ||
bootblock | ||
include/soc | ||
microcode | ||
romstage | ||
acpi.c | ||
chip.c | ||
chip.h | ||
cpu.c | ||
elog.c | ||
emmc.c | ||
gfx.c | ||
gpio.c | ||
gpio_support.c | ||
hda.c | ||
iosf.c | ||
Kconfig | ||
lpc_init.c | ||
lpe.c | ||
lpss.c | ||
Makefile.inc | ||
memmap.c | ||
northcluster.c | ||
pcie.c | ||
placeholders.c | ||
pmutil.c | ||
ramstage.c | ||
sata.c | ||
scc.c | ||
sd.c | ||
smihandler.c | ||
smm.c | ||
southcluster.c | ||
spi.c | ||
spi_loading.c | ||
tsc_freq.c |