eecb794c96
Pull all pm_read and write, smi_read and write variants into a single file. Change-Id: I87d17361f923a60c95ab66e150445a6a0431b772 Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-on: https://review.coreboot.org/21759 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
66 lines
1.4 KiB
C
66 lines
1.4 KiB
C
/*
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* This file is part of the coreboot project.
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*
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* Copyright 2017 Advanced Micro Devices, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <soc/southbridge.h>
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void pm_write8(u8 reg, u8 value)
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{
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write8((void *)(PM_MMIO_BASE + reg), value);
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}
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u8 pm_read8(u8 reg)
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{
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return read8((void *)(PM_MMIO_BASE + reg));
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}
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void pm_write16(u8 reg, u16 value)
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{
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write16((void *)(PM_MMIO_BASE + reg), value);
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}
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u16 pm_read16(u8 reg)
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{
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return read16((void *)(PM_MMIO_BASE + reg));
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}
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void pm_write32(u8 reg, u32 value)
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{
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write32((void *)(PM_MMIO_BASE + reg), value);
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}
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u32 pm_read32(u8 reg)
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{
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return read32((void *)(PM_MMIO_BASE + reg));
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}
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void smi_write32(uint8_t offset, uint32_t value)
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{
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write32((void *)(APU_SMI_BASE + offset), value);
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}
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uint32_t smi_read32(uint8_t offset)
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{
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return read32((void *)(APU_SMI_BASE + offset));
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}
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uint16_t smi_read16(uint8_t offset)
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{
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return read16((void *)(APU_SMI_BASE + offset));
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}
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void smi_write16(uint8_t offset, uint16_t value)
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{
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write16((void *)(APU_SMI_BASE + offset), value);
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}
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