coreboot-kgpe-d16/src/soc
Tim Wawrzynczak ef16df2782 southbridge/intel/common: Move invalid PIRQ value to 0
This makes structs that contain an `enum pirq` field that is
default-initialized have the value PIRQ_INVALID

Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: Idb4c7d79de13de0e4b187a42e8bdb27e25e61cc1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55281
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2021-06-29 21:50:35 +00:00
..
amd soc/amd/cezanne: Add call to mb to configure eSPI requirements 2021-06-28 15:57:26 +00:00
cavium
example
intel southbridge/intel/common: Move invalid PIRQ value to 0 2021-06-29 21:50:35 +00:00
mediatek soc/mediatek/mt8195: Utilize the retry macro 2021-06-26 10:09:20 +00:00
nvidia cbfs: Replace more instances of cbfs_boot_locate() with newer APIs 2021-03-17 08:10:20 +00:00
qualcomm sc7280: Add target specific GPIO pin definitions 2021-06-11 07:36:16 +00:00
rockchip soc/rockchip/rk3399/sdram: Add channel to error message 2021-03-04 01:22:10 +00:00
samsung commonlib/region: Turn addrspace_32bit into a more official API 2021-04-21 02:06:26 +00:00
sifive
ti soc/ti/am335x/mmc.c: Fix memset length argument 2021-04-04 09:58:26 +00:00
ucb