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coreboot-kgpe-d16/src/soc/intel
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Furquan Shaikh efe1e2d2d4 soc/intel/common/block/pmc: Move pmc_disable_all_gpe to romstage 
Instead of disabling all GPEs during PMC init in bootblock, this
change moves it to pmc_fill_power_state which allows romstage to
correctly fill up GPE_EN registers in chipset_power_state. This is
essential for correctly identifying the wake source.

Disabling all GPEs was added recently in change 74145f76
(intel/common/pmc: Disable all GPEs during pmc_init) because keeping
GPEs enabled in coreboot while enabling SMI could lead to
side-effects as explained in the change. Moving pmc_disable_all_gpe to
pmc_fill_power_state should be safe as that happens before SMI is
enabled in coreboot.

TEST=Verified that GPE-based wake source is correctly
identified. Also, no issues observed while resuming from S3.

Change-Id: I8e992ad09ffdefba62de11fa572e783715776bf1
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22033
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2017-10-17 14:45:12 +00:00
..
apollolake soc/intel/common: Clean up PMC library GPE handling API 2017-10-12 22:13:39 +00:00
baytrail chromeec: Remove checks for EC in RO 2017-10-04 20:55:12 +00:00
braswell soc/intel/braswell/acpi: Clean OpRegion up 2017-09-30 01:24:47 +00:00
broadwell chromeec: Remove checks for EC in RO 2017-10-04 20:55:12 +00:00
cannonlake soc/intel/common: Clean up PMC library GPE handling API 2017-10-12 22:13:39 +00:00
common soc/intel/common/block/pmc: Move pmc_disable_all_gpe to romstage 2017-10-17 14:45:12 +00:00
denverton_ns soc/intel/denverton_ns: Add support for Intel Atom C3000 SoC 2017-09-05 13:39:54 +00:00
fsp_baytrail cpu/x86/mp_init: remove adjust_cpu_apic_entry() 2017-09-11 01:17:45 +00:00
fsp_broadwell_de intel/fsp_broadwell_de: Add timestamp functionality 2017-10-12 16:20:50 +00:00
quark include/device: Split i2c.h into three 2017-08-18 15:33:29 +00:00
sch smbus: Fix a typo ("Set the device I'm talking too") 2017-09-27 16:38:18 +00:00
skylake soc/intel/common: sanity check ebda signature 2017-10-16 16:56:15 +00:00