coreboot-kgpe-d16/util/superiotool
Stefan Reinauer d7ce71d58f superiotool: Don't skip probing on a port if a a chip was detected on another port.
Only skip probing if chip was found on the same port already to avoid
duplicates.
Signed-off-by: Stefan Reinauer <stepan@coreboot.org>
Acked-by: Stefan Reinauer <stepan@coreboot.org>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2010-12-30 16:57:58 +00:00
..
COPYING Add a copy of the GPL (trivial). 2007-10-03 18:56:51 +00:00
Makefile Provide for I/O space access on NetBSD. 2010-10-24 14:10:35 +00:00
README Document CONFIG_PCI usage in the README (trivial). 2010-01-24 17:29:38 +00:00
ali.c The Winbond Super I/O chips have another indirection of registers. The 2008-12-01 14:18:57 +00:00
fintek.c Add Fintek F71889 detection and dump support. 2010-11-29 11:56:39 +00:00
ite.c superiotool: Don't skip probing on a port if a a chip was detected on another port. 2010-12-30 16:57:58 +00:00
nsc.c Add detection and dump support for the Winbond WPCD376I. 2009-11-09 22:34:17 +00:00
nuvoton.c Superiotool support for Nuvoton WPCE775x/NPCE781x. 2010-07-22 22:56:44 +00:00
pci.c Add missing files from the last commit (trivial). 2010-01-24 01:47:58 +00:00
smsc.c Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
superiotool.8 Since some people disapprove of white space cleanups mixed in regular commits 2010-04-27 06:56:47 +00:00
superiotool.c Add support for non LDN register/device naming. 2010-08-22 19:40:11 +00:00
superiotool.h Fix superiotool build on non-NetBSD x86_64. 2010-10-24 14:18:55 +00:00
via.c Add missing files from the last commit (trivial). 2010-01-24 01:47:58 +00:00
winbond.c superiotool: Don't skip probing on a port if a a chip was detected on another port. 2010-12-30 16:57:58 +00:00

README

-------------------------------------------------------------------------------
Superiotool README
-------------------------------------------------------------------------------

Superiotool is a user-space utility which can

 - detect which Super I/O chip is soldered onto your mainboard,

 - at which configuration port it's located (usually 0x2e or 0x4e), and

 - dump all register contents of the Super I/O chip, together with the
   default values as per datasheet (to make comparing the values easy).

It is mainly used for coreboot development purposes (see coreboot.org
for details on coreboot), but it may also be useful for other things.


Installation
------------

 $ svn co svn://coreboot.org/repos/trunk/util/superiotool

 $ cd superiotool

Optional: Edit the Makefile and set 'CONFIG_PCI = no' if you don't want to
support PCI-attached "Super I/Os" (which needs libpci-dev) such as the
VIA VT82686A/B southbridge with integrated Super I/O functionality.

 $ make

 $ sudo make install


Usage
-----

Please read the superiotool(8) manpage or type 'superiotool --help'.

Per default (no options) superiotool will just probe for a Super I/O
and print its vendor, name, ID, revision, and config port.

Typical usage of superiotool:

 - Probe/detect the Super I/O in your mainboard:

   $ superiotool

 - Register dump as table of hex-values of the Super I/O (if detected):

   $ superiotool -d


Supported Super I/O Chips
-------------------------

Please see http://coreboot.org/Superiotool#Supported_devices, or type

 $ superiotool -l

There's also a collection of sample register dumps from various Super I/O
chips on that web page. Please send further register dumps (either from a
proprietary BIOS and/or from coreboot) to the coreboot mailing list
(http://coreboot.org/Mailinglist).


Website and Mailing List
------------------------

The main website is http://coreboot.org/Superiotool.

For additional information, patches, and discussions, please join the
coreboot mailing list at http://coreboot.org/Mailinglist, where most
superiotool developers are subscribed.


Copyright and License
---------------------

Superiotool is copyrighted by a number of individual developers. Please
refer to the respective source code files for details.

It is licensed under the terms of the GNU General Public License (GPL),
either version 2 of the license, or (at your option) any later version.


Contributors
------------

Anders Juel Jensen <andersjjensen@gmail.com>
Andriy Gapon <avg@icyb.net.ua>
Arjan Koers <0h3q2rmn2bdb@list.nospam.xutrox.com>
Bingxun Shi <bingxunshi@gmail.com>
Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
David Bartley <dtbartle@csclub.uwaterloo.ca>
David Hendricks <david.hendricks@gmail.com>
François-Regis Vuillemin <coreboot@miradou.com>
Frieder Ferlemann <Frieder.Ferlemann@web.de>
Idwer Vollering <idwer_v@hotmail.com>
Ioannis Barkas <tripl3fault@yahoo.com>
Josh Profitt <zorn169@gmail.com>
Luc Verhaegen <libv@skynet.be>
Michael Gold <mgold@ncf.ca>
Michał Mirosław <mirq-linux@rere.qmqm.pl>
Nikos Barkas <levelwol@gmail.com>
Rasmus Wiman <rasmus@wiman.org>
Robinson P. Tryon <bishop.robinson@gmail.com>
Ronald Hoogenboom <hoogenboom30@zonnet.nl>
Ronald Minnich <rminnich@gmail.com>
Sean Young <sean@mess.org>
Stefan Reinauer <stepan@coresystems.de>
Tom Sylla <tsylla@gmail.com>
Ulf Jordan <jordan@chalmers.se>
Urja Rannikko <urjaman@gmail.com>
Uwe Hermann <uwe@hermann-uwe.de>
Ward Vandewege <ward@gnu.org>