coreboot-kgpe-d16/src/soc
Teo Boon Tiong f296ce91b9 soc/intel/skylake: Expand USB OC pins definition to support PCH-H
Currently the USB OC pins definition only being defined up to OC3.
For PCH-H, OC4 and OC5 are needed, so add both into OC pin enum.

Changes is being verified and booted to Yocto with Saddle Brook.

Change-Id: Idaed6fa7dcddb9c688966e8bc59f656aec2b26eb
Signed-off-by: Teo Boon Tiong <boon.tiong.teo@intel.com>
Reviewed-on: https://review.coreboot.org/18364
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2017-02-20 04:44:47 +01:00
..
broadcom/cygnus spi: Get rid of SPI_ATOMIC_SEQUENCING 2016-12-23 04:54:55 +01:00
dmp/vortex86ex src/soc: Capitalize CPU, ACPI, RAM and ROM 2016-07-31 19:27:53 +02:00
imgtec/pistachio spi: Get rid of SPI_ATOMIC_SEQUENCING 2016-12-23 04:54:55 +01:00
intel soc/intel/skylake: Expand USB OC pins definition to support PCH-H 2017-02-20 04:44:47 +01:00
lowrisc/lowrisc soc/lowrisc: Place CBMEM at top of autodetected RAM 2016-12-06 18:51:13 +01:00
marvell soc/marvell/mvmap2315: Mark mvmap2315_reset() as noreturn 2017-01-12 18:52:11 +01:00
mediatek/mt8173 spi: Get rid of SPI_ATOMIC_SEQUENCING 2016-12-23 04:54:55 +01:00
nvidia spi: Define and use spi_ctrlr structure 2016-12-05 03:29:04 +01:00
qualcomm spi: Get rid of SPI_ATOMIC_SEQUENCING 2016-12-23 04:54:55 +01:00
rdc/r8610 rdc/r8610: Move to src/soc 2016-05-05 20:08:58 +02:00
rockchip rockchip/rk3399: set edp pclk to 25MHz 2017-01-24 09:34:04 +01:00
samsung samsung/exynos5420: Fix test for src < 0 2016-12-16 15:57:56 +01:00
ucb/riscv soc/ucb/riscv: Place CBMEM at top of autodetected RAM 2016-12-06 18:48:28 +01:00