6b5bc77c9b
Stefan thinks they don't add value. Command used: sed -i -e '/file is part of /d' $(git grep "file is part of " |egrep ":( */\*.*\*/\$|#|;#|-- | *\* )" | cut -d: -f1 |grep -v crossgcc |grep -v gcov | grep -v /elf.h |grep -v nvramtool) The exceptions are for: - crossgcc (patch file) - gcov (imported from gcc) - elf.h (imported from GNU's libc) - nvramtool (more complicated header) The removed lines are: - fmt.Fprintln(f, "/* This file is part of the coreboot project. */") -# This file is part of a set of unofficial pre-commit hooks available -/* This file is part of coreboot */ -# This file is part of msrtool. -/* This file is part of msrtool. */ - * This file is part of ncurses, designed to be appended after curses.h.in -/* This file is part of pgtblgen. */ - * This file is part of the coreboot project. - /* This file is part of the coreboot project. */ -# This file is part of the coreboot project. -# This file is part of the coreboot project. -## This file is part of the coreboot project. --- This file is part of the coreboot project. -/* This file is part of the coreboot project */ -/* This file is part of the coreboot project. */ -;## This file is part of the coreboot project. -# This file is part of the coreboot project. It originated in the - * This file is part of the coreinfo project. -## This file is part of the coreinfo project. - * This file is part of the depthcharge project. -/* This file is part of the depthcharge project. */ -/* This file is part of the ectool project. */ - * This file is part of the GNU C Library. - * This file is part of the libpayload project. -## This file is part of the libpayload project. -/* This file is part of the Linux kernel. */ -## This file is part of the superiotool project. -/* This file is part of the superiotool project */ -/* This file is part of uio_usbdebug */ Change-Id: I82d872b3b337388c93d5f5bf704e9ee9e53ab3a9 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41194 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
80 lines
2.2 KiB
C
80 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/* The devicetree parser expects chip.h to reside directly in the path
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* specified by the devicetree. */
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#ifndef _BAYTRAIL_CHIP_H_
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#define _BAYTRAIL_CHIP_H_
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#include <drivers/intel/gma/i915.h>
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#include <stdint.h>
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struct soc_intel_baytrail_config {
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uint8_t enable_xdp_tap;
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uint8_t sata_port_map;
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uint8_t sata_ahci;
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uint8_t ide_legacy_combined;
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uint8_t clkreq_enable;
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/* VR low power settings -- enable PS2 mode for gfx and core */
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int vnn_ps2_enable;
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int vcc_ps2_enable;
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/* Disable SLP_X stretching after SUS power well loss. */
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int disable_slp_x_stretch_sus_fail;
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/* USB Port Disable mask */
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uint16_t usb2_port_disable_mask;
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uint16_t usb3_port_disable_mask;
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/* USB routing */
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int usb_route_to_xhci;
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/* USB PHY settings specific to the board */
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uint32_t usb2_per_port_lane0;
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uint32_t usb2_per_port_rcomp_hs_pullup0;
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uint32_t usb2_per_port_lane1;
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uint32_t usb2_per_port_rcomp_hs_pullup1;
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uint32_t usb2_per_port_lane2;
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uint32_t usb2_per_port_rcomp_hs_pullup2;
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uint32_t usb2_per_port_lane3;
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uint32_t usb2_per_port_rcomp_hs_pullup3;
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uint32_t usb2_comp_bg;
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/* LPE Audio Clock configuration. */
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int lpe_codec_clk_freq; /* 19 or 25 are valid. */
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int lpe_codec_clk_num; /* Platform clock pins. [0:5] are valid. */
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/* Native SD Card controller - override controller capabilities. */
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uint32_t sdcard_cap_low;
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uint32_t sdcard_cap_high;
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/* Enable devices in ACPI mode */
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int lpss_acpi_mode;
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int scc_acpi_mode;
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int lpe_acpi_mode;
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/* Allow PCIe devices to wake system from suspend. */
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int pcie_wake_enable;
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uint8_t gpu_pipea_port_select; /* Port select: 1=DP_B 2=DP_C */
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uint16_t gpu_pipea_power_on_delay;
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uint16_t gpu_pipea_light_on_delay;
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uint16_t gpu_pipea_power_off_delay;
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uint16_t gpu_pipea_light_off_delay;
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uint16_t gpu_pipea_power_cycle_delay;
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int gpu_pipea_pwm_freq_hz;
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uint8_t gpu_pipeb_port_select; /* Port select: 1=DP_B 2=DP_C */
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uint16_t gpu_pipeb_power_on_delay;
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uint16_t gpu_pipeb_light_on_delay;
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uint16_t gpu_pipeb_power_off_delay;
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uint16_t gpu_pipeb_light_off_delay;
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uint16_t gpu_pipeb_power_cycle_delay;
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int gpu_pipeb_pwm_freq_hz;
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int disable_ddr_2x_refresh_rate;
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struct i915_gpu_controller_info gfx;
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};
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#endif /* _BAYTRAIL_CHIP_H_ */
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