f3aa375f44
The existing code did not set Rtt timing parameters when registered DIMMs were used with Family 15h processors. Set the Rtt values according to the BKDG recommendations. Change-Id: I80cd7f8aec12951611d802f33e5e167a41dd532e Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/12010 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> |
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