Xiang Wang f4e1583376 soc/sifive/fu540: add code for spi and map flash to memory spaces ... SiFive's ZSBL has initialized flash, but only 16MB of space is available. 1. add code for spi 2. add code to map flash to memory spaces Change-Id: I106688c65ac7dd70be7479dc4691797b700682d9 Signed-off-by: Xiang Wang <merle@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>		2019-08-12 08:35:17 +00:00
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include/soc	soc/sifive/fu540: add code for spi and map flash to memory spaces	2019-08-12 08:35:17 +00:00
bootblock.c	device/mmio.h: Add include file for MMIO ops	2019-03-04 15:57:39 +00:00
cbmem.c	sifive/fu540: correct cbmem support	2018-10-30 02:07:12 +00:00
clint.c	device/mmio.h: Add include file for MMIO ops	2019-03-04 15:57:39 +00:00
clock.c	src/mb/sifive/hifive-unleashed: initialize Gigabit Ethernet Controller	2019-03-18 09:12:46 +00:00
ddrregs.h	soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization	2018-09-14 09:27:29 +00:00
Kconfig	soc/sifive/fu540: Add opensbi support	2019-08-05 06:17:24 +00:00
Makefile.inc	soc/sifive/fu540: add code for spi and map flash to memory spaces	2019-08-12 08:35:17 +00:00
otp.c	device/mmio.h: Add include file for MMIO ops	2019-03-04 15:57:39 +00:00
regconfig-ctl.h	soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization	2018-09-14 09:27:29 +00:00
regconfig-phy.h	soc/sifive/fu540: add SiFive supplied header files for SDRAM initialization	2018-09-14 09:27:29 +00:00
sdram.c	soc/sifive/fu540: Remove PLL parameters from sdram.c	2018-09-26 18:52:27 +00:00
spi.c	soc/sifive/fu540: add code for spi and map flash to memory spaces	2019-08-12 08:35:17 +00:00
spi_internal.h	soc/sifive/fu540: add code for spi and map flash to memory spaces	2019-08-12 08:35:17 +00:00
uart.c	soc/sifive/fu540: Add helper function to get tlclk frequency	2018-12-05 13:36:43 +00:00
ux00ddr.h	soc/sifive/fu540: Initialize SDRAM	2018-09-14 10:32:20 +00:00