Subrata Banik f5afc1a5a2 soc/intel/meteorlake: Drop redundant MCHBAR programming in romstage ... This patch drops redundant MCHBAR programming in romstage as bootblock already done with MCHBAR setting up. TEST=Able to boot Google/Rex to ChromeOS and MCHBAR is set to correct value as per iomap.h Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: Ic2c05f47ab22dc7fe087782a1ce9b7b692ea157e Reviewed-on: https://review.coreboot.org/c/coreboot/+/67455 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>		2022-09-10 19:00:39 +00:00
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alderlake	soc/intel/alderlake: add power limits for Alder Lake-N 7W soc	2022-09-08 14:19:57 +00:00
apollolake	vendorcode/intel/fsp2/glk: Add the FSP headers for version 2.2.3.1	2022-09-01 14:18:19 +00:00
baytrail	nb,soc/intel: Handle upper RAM boundary	2022-07-05 13:08:34 +00:00
braswell	nb,soc/intel: Handle upper RAM boundary	2022-07-05 13:08:34 +00:00
broadwell	{sb,soc}/intel: Do not require hda_verb.c	2022-08-23 14:04:47 +00:00
cannonlake	soc/intel/cannonlake: Set MAX_CPUS based on the SoC and PCH	2022-07-23 19:48:56 +00:00
common	soc/intel/common/smbus: Add missing ID for GLK	2022-09-08 15:33:35 +00:00
denverton_ns	nb,soc/intel: Handle upper RAM boundary	2022-07-05 13:08:34 +00:00
elkhartlake	soc/intel/common/pch: Decouple CLIENT from BASE	2022-07-20 12:33:25 +00:00
icelake	soc/intel/common/pch: Decouple CLIENT from BASE	2022-07-20 12:33:25 +00:00
jasperlake	soc/intel/common/pch: Decouple CLIENT from BASE	2022-07-20 12:33:25 +00:00
meteorlake	soc/intel/meteorlake: Drop redundant MCHBAR programming in romstage	2022-09-10 19:00:39 +00:00
quark	treewide: Don't add bits	2022-07-18 12:44:32 +00:00
skylake	soc/intel/common/pch: Decouple CLIENT from BASE	2022-07-20 12:33:25 +00:00
tigerlake	soc/intel: Enable TME based on supported CPU SKU and config option	2022-08-21 15:02:31 +00:00
xeon_sp	treewide: Remove unused <cpu/x86/mtrr.h>	2022-07-20 13:18:39 +00:00
Makefile.inc