Angel Pons f5ec52a522 nb/intel/haswell: Move USB config API into Lynx Point ... Both EHCI and xHCI USB controllers are inside the PCH (southbridge). Now that mainboard USB configuration no longer depends on pei_data.h definitions, the API declarations can be placed in southbridge code. Tested with BUILD_TIMELESS=1, Asrock B85M Pro4 remains identical. Change-Id: Ia21991b225482b33c5bc0dc52884674d301b28ba Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51569 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>		2021-03-25 07:51:50 +00:00
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common	nb/intel/common/fixed_bars.h: Add casts to uintptr_t	2021-02-12 07:52:37 +00:00
e7505	src: use ARRAY_SIZE where possible	2021-02-15 11:30:40 +00:00
gm45	nb/intel: Add missing <types.h>	2021-02-16 20:56:56 +00:00
haswell	nb/intel/haswell: Move USB config API into Lynx Point	2021-03-25 07:51:50 +00:00
i440bx
i945	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00
ironlake	nb/intel/ironlake: Avoid casting pointers to structs	2021-02-27 09:39:28 +00:00
pineview	nb/intel/pineview: Drop unused GPIO32 macro	2021-02-18 10:14:56 +00:00
sandybridge	nb/intel/sandybridge: Clean up dram_timing function	2021-03-01 08:31:44 +00:00
x4x	device/device.c: Rename .disable to .vga_disable	2021-02-24 11:28:16 +00:00